The present invention relates to charge pumps, and more particularly, to a charge pump architecture and related method for reducing a current mismatch.
Charge pumps are essential components of phase locked loops (PLLs). A charge pump conventionally consists of a capacitor, coupled between an up circuit and a down circuit. A current source for charging the capacitor is provided to the up circuit in response to an up pulse, and a current sink for discharging the capacitor is provided to the down circuit in response to a down pulse. The amount of charge pumped to or from the capacitor depends on the durations of the up pulse and down pulse respectively.
If the value of the current sink does not match the value of the current source, i.e. there is a current mismatch, there will be some degradation in the overall performance of the charge pump. In a phase locked loop (PLL) system, for example, a current mismatch results in a net charge being applied to the capacitor, so the phase and frequency of a feedback clock will not match the phase and frequency of a reference clock.
Please refer to FIG. 1. FIG. 1 is a diagram of a related art charge pump circuit 140 coupled to a loop filter 138. Transistors 102 and 106 provide a current source. Transistors 124 and 126 provide a current sink. Transistor 112 forms an up circuit for passing the current source, and transistor 116 forms a down circuit for passing a current sink. Transistors 100 and 104 steer a reference current. During idle times, i.e. when the up/dn pulse is low, transistors 110 and 114 will be operational. Current from the transistor 102/106 can be steered to charge the sampling capacitor 122 to produce a stored voltage VSTORE.
When switches 118 and 120 are turned on, they will inject a mismatch current to 122 and VSTORE will bias the transistor 126. When there is a current mismatch where the current sink is less than the current source, V−>VSTORE, the capacitor will be charged and more current will be sunk through the transistor 126. When there is a current mismatch where the current sink is greater than the current source, V−<VSTORE so the capacitor 122 will be discharged and less current will be sunk through the transistor 126. This feedback loop enables the charge pump circuit 140 to match currents. The disadvantage is that the charge pump circuit 140 is calibrated with respect to the voltage V− at the intermediate node, but this voltage is not equal to the voltage output by the charge pump circuit 140. As there is almost no current drop across the loop filter 138, then the output voltage V+ of the charge pump circuit 140 will equal the output voltage VTUNE of the loop filter 138. If the current mismatch is not calibrated with respect to V+ there will also be inaccuracies in the output of the loop filter 138.